As the integration degree of integrated circuits increases, many efforts have been made to integrate more devices such as transistors within a limited substrate area. In order to reduce the substrate area occupied by one transistor, various vertical transistor structures with a vertical semiconductor channel provided on a substrate have been proposed.
A nanowire field-effect transistor (FET) is one of these vertical transistor structures. In the nanowire FET, a signal current flows through a plurality of vertical nanowires disposed between a source electrode and a drain electrode of the nanowire FET, and the plurality of vertical nanowires is the vertical semiconductor channel between the source electrode and the drain electrode. The vertical semiconductor channel is controlled by a voltage on a vertical gate electrode, which surrounds each of the plurality of vertical nanowires. Therefore, the nanowire FETs are also called vertical gate-all-around (VGAA) field-effect transistors. Among various proposed vertical transistor structures, the nanowire FETs has attracted much attention, and has been regarded as a highly potential candidate for increasing the integration degree of integrated circuits in following generations.
Therefore, various integrated circuits with the nanowire FETs have been proposed. However, technological advances in structure design of integrated circuits with the nanowire FETs are required to overcome various difficulties because requirements in providing the integrated circuits with advanced performances are becoming more challenging. As such, improvements in integrated circuits and methods of fabricating thereof continue to be sought.